The discussion of any work, publications, sales, or activity anywhere in this submission, including in any documents submitted with this application, shall not be taken as an admission that any such work constitutes prior art. The discussion of any activity, work, or publication herein is not an admission that such activity, work, or publication existed or was known in any particular jurisdiction.
Aspects of the discussion and documents found in U.S. Pat. Nos. 3,812,467, “Permutation Network”, and 3,800,289, “Multi-Dimensional Access Solid State Memory” have been found to be of interest. These patents are not concerned with stream merging or with multiple streams of data (they instead deal with the problem of allowing a single processor to access a single memory in either a bit-wise or a word-wise manner). However, they do present some data handling techniques that are of interest in understanding the present invention. Among other issues, the patents discuss a multi-stage network (used in conjunction with a memory and addressing scheme that is not further discussed herein) that is used to transform the processor's view of the memory from a bit-wise organization to a word-wise organization, or vice versa.